Mastering Castellated Hole PCB Design for Reliable Module Integration

17 8 月, 2026

By bot-API

Introduction to Castellated Hole Technology in PCB Design

Castellated holes—plated half-vias precisely routed along a board edge—have become the backbone of modern module-to-board integration. By enabling direct surface-mount soldering of a smaller PCB onto a larger carrier, this technique eliminates bulky connectors, reduces overall system height, and significantly improves signal integrity. OEM buyers across IoT, wireless, and embedded sectors demand this architecture to achieve compact, high-reliability products. When properly executed, castellated hole PCBs deliver robust mechanical anchoring and low-inductance electrical pathways, making them indispensable for Wi-Fi modules, Bluetooth devices, and sensor subassemblies.

Direct soldering through castellated holes shortens the interconnect length compared to traditional pin headers, minimizing parasitic inductance and impedance discontinuities. This is particularly critical for high-speed circuits where every millimeter of signal path matters. For a deeper look into maintaining signal fidelity in such designs, refer to our resource on Essential PCB Signal Integrity Design for High-Speed Circuits.

Strategic Layout Configurations for Module Boards

Selecting the right castellated hole arrangement is a mechanical and electrical decision that directly impacts pin count, mechanical stability, and assembly yield. Three common topologies dominate:

  • Single-row: A linear array along one board edge, ideal for space-constrained modules where a standard connection is sufficient.
  • Double-row: Two parallel rows that increase I/O density and provide additional mechanical support. This configuration is preferred for heavier modules requiring more interconnects while maintaining a small footprint.
  • Full castellations: Continuous half-hole edges that create a uniform solder interface. This is the standard choice for wireless modules (Bluetooth, Wi-Fi) where maximum bond strength and consistent RF grounding are required.

Your choice must align with both the functional specifications and the manufacturer’s capabilities. Full castellations, for example, deliver superior rigidity for applications subject to vibration or thermal cycling. When defining the board outline, ensure that the panel routing plan accounts for the exact hole centerline to avoid asymmetric copper remnants.

Engineering Robust Half-Hole Geometries

Dimensional precision is the foundation of a reliable castellated design. Drill diameter, pad size, and clearance to the board edge must be dialed in to prevent copper peeling or shorts during fabrication.

Drill and Pad Specifications
Select a finished hole diameter that allows the router bit to cleanly pass through the plated barrel. The copper wall must be thick enough—typically at least 25 µm—to survive the mechanical cutting force. Insufficient plating thickness leads to tearing, while excessive thickness can become brittle. Maintain adequate pad-to-pad spacing to avoid bridging after soldering, and extend pad geometries onto both the top and bottom layers to maximize solder fillet area. These anchor pads enhance lateral strength and distribute thermal stress, directly improving long-term reliability under shock and vibration.

Edge Clearance and IPC Compliance
Adhere to IPC-A-610 Class 3 standards for high-reliability products. This means specifying a minimum annular ring that prevents pad lifting during reflow and maintaining a safe distance between the outer edge of the hole and the routed board edge. Discuss these parameters with your fabricator early; they can advise on tool compensation and drilling/routing sequences that preserve copper integrity. Poorly documented edge requirements are a primary cause of production delays and scrap, so clarity in fabrication notes is non-negotiable.

The Manufacturing Process: From Drilling to Edge Milling

Producing a castellated hole PCB requires a specialized workflow that integrates standard PCB processing with precision edge routing. The sequence is critical:

  1. Primary Drilling: Full through-holes are drilled along the panel edge where each half-hole will reside.
  2. Copper Plating: Electroless and electrolytic copper deposition build the conductive barrel inside every hole.
  3. Edge Milling: During final board profiling, the router bit passes directly through the center of each plated hole, splitting it into two half-vias.
  4. Quality Cleaning: Secondary drilling or diamond-coated routing bits remove micro-burrs, and automated optical inspection (AOI) verifies pad integrity.

Fabricators combat copper burrs by adjusting feed rates and using climb milling. Standard milling bits can push soft copper into adjacent holes, causing shorts; therefore, a dedicated finishing pass is essential. Communicating the presence of castellated features before quoting allows the factory to optimize tool paths and protect delicate edge structures.

Surface Finish Selection for High-Reliability Connections

Bare copper on exposed half-holes is vulnerable to oxidation, which compromises solderability. The surface finish must provide a flat, solderable interface that withstands storage and multiple reflow cycles.

ENIG (Electroless Nickel Immersion Gold) is the gold standard for castellated hole PCBs. Its planar surface ensures uniform solder paste deposition and prevents module misalignment during placement. The gold layer resists corrosion, extending shelf life beyond 12 months. In contrast, HASL (Hot Air Solder Leveling) results in an uneven meniscus that tilts the module during reflow, risking open joints or bridging. For cost-sensitive projects, Immersion Silver offers a flat profile with good solderability, though it has a shorter shelf life. Always specify ENIG when reliability and surface planarity are critical, especially for fine-pitch castellated arrays.

Assembly Best Practices: Stencils, Reflow, and Inspection

Achieving consistent solder joints on castellated edges demands tight process control. Solder paste volume is the primary variable. Excessive paste leads to bridging, while insufficient paste weakens joints.

Design your stencil apertures slightly smaller than the PCB pads to create a gasket effect and limit paste deposition. For the inner row of double-row configurations, further aperture reduction helps prevent solder balls. During reflow, a carefully profiled ramp-soak-spike curve ensures the solder wicks fully into the half-hole gaps. Matching the thermal mass of the module and the main board prevents cold joints and tombstoning.

Post-assembly inspection should combine AOI with X-ray analysis. X-ray imaging reveals internal voids, insufficient fill, and hidden bridging that AOI alone might miss. A high-quality joint appears dark and uniform under X-ray; any discontinuity signals a potential reliability threat. Immediate feedback from inspection data allows process engineers to fine-tune stencils and profiles, raising first-pass yield.

Mitigating Common Manufacturing Defects

Even with robust design, certain defects can arise. Proactive engineering prevents most of them.

  • Copper Tearing: High router speeds can rip copper from the laminate. Reduce feed rates by 50% when routing near castellations and specify climb milling. A minimum copper plating thickness of 25 µm in the hole wall provides structural integrity.
  • Solder Bridging: Adjacent half-hole pads often see solder wicking across the gap. Adding solder mask dams between pads acts as a physical barrier, while a thinner stencil (100–120 µm) limits paste volume.
  • Pad Lifting: Thermal shock during rework can delaminate pads. Design large internal anchor pads and control iron temperatures during touch-up. Proper preheating of the assembly also reduces thermal stress.

Documenting these manufacturability (DFM) rules in your fabrication notes ensures that every stakeholder—from layout engineer to assembly technician—works toward the same quality target.

Partner with LT CIRCUIT for Castellated Hole PCBs

LT CIRCUIT brings precision engineering and proven reliability to every castellated hole PCB project. Our in-house manufacturing process—including stack-up lamination and laser drilling—eliminates reliance on third-party contractors, ensuring tight quality control and faster lead times. We specialize in high-precision, multi-layered boards and HDI Any Layer PCBs, routinely exceeding IPC-3 standards for demanding OEM applications.

With raw materials like Rogers, High TG FR4, and high-speed laminates always in stock, we accelerate production without compromising on performance. We routinely handle small pilot volumes and fast-turn prototypes, delivering in as little as 12 hours. Our experience with industry leaders such as Signify, Osram, and Firstronic means we understand the rigorous workflow and quality expectations of global OEM buyers. Whether you need standard single-row castellations or complex full-edge designs on multilayer boards, LT CIRCUIT provides the capability and service to bring your module to market with confidence. Contact us today to discuss your next board-level integration challenge.

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